Tekmos Talks Newsletters
A newsletter for the semiconductor industry
Tekmos Talks 2018
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| A Newsletter for the Semiconductor Industry | ||
| January 2018 | ||
| The Story Behind the Development of the New TK87C51 Series | ||
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Tekmos is starting off the new year by releasing our new product line of programmable 87C51 microcontrollers. Designed as drop-in replacements for the 87C51 products formerly offered by Intel, NXP, and Atmel, these parts are available with program memories ranging from 8K to 64K, and in the PLCC, PDIP and LQFP packages. The TK87C51 series is based on our 80C51 family that has been in production for years. When our original fab closed, we had to transfer the part to our new fab in Dresden, Germany. At that time, we decided to add flash support and additional RAM to the part which creates the 87C51Rx2 series. The ROMless parts remain as they were before, but now we have the option of adding flash to each part, using our stacked die technology. There are a number of details in adding the flash. First is interfacing the flash to the processor. The 87C51Rx2 family runs from 3 to 5 volts. Our flash memories run off of 3 volts. So, we have to put a 5V to 3V voltage regulator on the die. The voltage regulator is more complex than normal because it must be able to handle the rapid increase in the flash supply current when the device is being programmed. The second detail was determining how to program the flash. We made the part so that it emulated the original part during programming. This meets customer needs, but we have additional manufacturing requirements. Our flash has 512K bytes in it. We need either 8K, 16k, 32K or 64K bytes for program storage, depending on the type of 87C51 we are replacing. The control for the program size is kept in flash, along with the security bits and clock speed. We have had to add a special parallel programming mode that lets us have access to all the bytes in the flash. We have a third programming mode, ISP (In System Programming), that could also allow the part to be used in 89C51 applications. A third flash design issue was adding circuitry that read the flash right after the termination of reset and then downloaded the configuration byte, security bits, and speed select. And speaking of reset, we modified the reset circuit by adding a filter that prevent short glitches on the reset line from resetting the part. We have seen noisy applications with the 80C51 where this was a problem, and wanted to prevent that problem from occurring on the new 87C51 devices. With these changes included, we made silicon, and now have the parts ready to sample. To learn more contact: Sales. |
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| From the Desk of the President, Lynn Reed | ||
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Self-timed High Temperature ROM This is the 4th article about the design of the Tekmos high temperature ROM. The Tekmos ROM is based off a read cycle. On a clock edge, the precharge on the bit lines is turned off, and the word line is turned on. If a zero is being read, the bit will pull the bit line low. And after sufficient time has passed, the sense amps will be clocked, latching in the read data. Then the word lines will be turned off, and the precharge turned back on again. Then the ROM waits for the next read cycle. The challenge is setting the delay between turning on the word lines, and clocking the sense amps. If the sense amps are clocked too soon, then bad data will be clocked in, and the ROM will fail. But delaying the sense am clocking increases the ROM access time, which is the key parameter for the ROM. If the access time is too long, then the processor may read in bad data, which is a ROM failure. To make the design work, we need a delay that exactly tracks the delays of the ROM read cycle. And the way we get that delay is to add another bit line to the design. The increase from 568 to 569 bit lines is a very small increase in ROM area, but provides a lot of benefits. This additional bit line is pre-programmed with zeros. Because every bit is set, and has added it's capacitance to the bit line, this additional bit line is guaranteed to be slower than any other bit line. The new bit line then goes through an 8:1 mux so that the total delay matches the other bit lines. But instead of a sense amp, this bit line goes to a ratioed inverter. Since the bit line is always going to read a zero, the inverter will always switch after every other bit line has valid data on it. We then use this inverter to clock the sense amps for the other bit lines. And since the sense amps are inverters too, as long as the reference has an equal or lower threshold, the design will work every time, regardless of voltage, temperature, or process variations. Next month I will discuss how the ECC circuit works.
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| Inside Tekmos | ||
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Tekmos Holidays While December is the time to make all of the end of year shipments, it is also the time for parties. At least for Tekmos. We stayed in this year, and had a pot-luck spread, followed by a white elephant gift exchange. We have done white elephant exchanges for years, but this is the first time that everyone wound up with something that they actually wanted. December was also time for the flu. You can divide up Tekmos into two types of people. Those who get flu shots, and those who don't. And everyone who caught the flu was in the second group. We had our intern return from college work over the holidays. But what would have been 3 weeks of work has been shortened to two, because he was one of those without a flu shot. |
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| Thank You for Reading Tekmos Talks | ||
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Thank you for reading Tekmos Talks and helping us celebrate 20 plus years. Sincerely, Lynn Reed, President
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Tekmos Talks
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