The Tekmos Unify program combines multiple die in a single package. Typically, this is done to save board space in size critical applications such as implantable medical electronics. We recently came across a different requirement where we were replacing an obsolete hybrid module containing 5 volt SRAM and flash memories. Since 5 volt flash memories are no longer available, we created an ASIC that supplied both a 3 volt power supply and had level translators to support the different power supply domains. The final product contained our ASIC, four 512Kx8 SRAMs, and four 512Kx8 flash memories.
The ASIC was large, at 12 mm per side. The ASIC size was dictated by the size of the stacked memories. Since the voltage regulator are not that large, we used the rest of the ASIC space to create large decoupling capacitors to assist with the high speed SRAMs.
Above is a picture of the final product. There are three different types of die in the package, each from a different wafer fab, and each type has slightly different oxide thicknesses. This causes each die to have a slightly different color. The large green die on the bottom is our ASIC. The white die are the SRAMs, and the red die are the flash memories. Each stack of die is 512K bytes, with the overall chip having 512K of 32-bit words.
Having parallel stacks of die led to some interesting bonding problems. Between the stacks we have two sets of staggered pads, for a total of 4 rows. We had to separate the staggered pads so that the back end of the bonding tool would not damage the second set while bonding the first set.
The ASIC has 387 bond pads. We needed to probe the device, but did not want to invest in a complicated probe card that could cover 8 vertical rows and 4 horizontal rows of bond pads. So we added a type of scan circuitry that allowed us to verify the connectivity and operation of all the internal bond pads. We also brought out the four voltage regulators so they could be tested.
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