Analog Layout Approaches

Traditional analog layout uses what is called the full custom approach. Its advantage is that it generates the highest performance analog circuitry. The disadvantage is that it is very labor intensive, and takes a long time to complete. Analog circuitry frequently requires a second revision to adjust parameters. And with a full custom approach, that can mean extensive reworking of the layout, or even starting over.

A second approach is to use pre-existing analog cells. Unfortunately, they may not be optimized for a particular application, and may have to be redone to meet the application requirements.

Another approach is to use an analog array. The array consists of a mixture of transistors, resistors, and capacitors. The circuit is defined by the interconnect, which is typically done in metal or via fabric. Analog arrays generate acceptable performance with greatly reduced layout time and lower NRE charges. On the down side, the circuit is larger than a full custom part, and that adds to the volume production price. One of the main advantages of analog arrays is the savings in time. Not only is the layout time reduced, but frequently wafers can be started before the design is even finished. That is because the analog array contains sufficient flexibility to accommodate design changes to device sizes. Starting the arrays early can cut 4 to 5 weeks off of the wafer processing time. Also, the fab lot can be split, with some wafers held at the programming step, and that will allow a quick turn on the second revision as well.

Transistors

So what is an analog array? It begins with the need for analog transistors. While all transistors can be considered to be analog, it is frequently necessary in analog design for two adjacent transistors to have matching electrical characteristics. The better the matching, the better the analog performance. In the digital world, the only things that matter are speed and area, so very small transistors are used. But the smallest transistors will have the greatest mismatches, since naturally occurring edge variations are now a greater percentage of the transistor dimensions. These edge effects can be minimized by using larger transistors.

The next decision is to determine what size transistors need to be included in the analog array. In general, there is a need for a number of identical width transistors that can be used as building blocks. There is also a need for a limited number of much wider transistors that can be used as the input stage of op-amps and comparators. And there is a need for longer L devices that can be used in low power applications. There is another need for digital devices that can be used to switch the capacitors used in filters and integrators. But even this is complicated. They can be drawn with equal P and N sizes to minimize switching noise, or they can be drawn with equal strengths for less distortion.

Resistors and Capacitors

An analog array also needs capacitors. In general, you can use a value made up from multiple unit capacitors. But you may also need a few capacitors that are odd sized, for use in scaling capacitor arrays that are used in analog to digital converter arrays.

And we need resistors. Lots of unit resistors, with the unit being typically somewhere between 500 and 1000 ohms. The unit resistors can be combined in series and parallel to produce almost any desired value. There is also a need for larger value resistors. These might be well resistors, or specially implanted poly.

Tiles for Layout

It is convenient to group a select number of transistors, resistors, and capacitors, and group them together in a tile, and then use multiple instances of the tile to create the chip. Unfortunately, you will need more than one type of tile. For example, consider the needs of a band gap voltage reference. The bandgap design needs an array of bipolar transistors in order to work. Bandgaps are almost the only circuit element that needs this array of bipolar devices, and since you can generate multiple voltage references off of a single bandgap, you will likely only need one bandgap per chip. So it would be wasteful to include this bipolar array in every tile. There are several other cases where a specialized tile is a good idea. Even in a specialized tile, the other devices can be generic transistors that are programmed rather than being dedicated to a specific design.

Reducing the Overall Cycle Time

Well before the design is done, the designer will have a very good idea of the amount of circuitry required to complete the design. This makes it possible to combine multiple tiles and digital logic to create a structured array very early in the design process. This array can be started in the fab, and receive the first 5 weeks of processing while the design of the personalization layers is being completed. This can remove an additional month from the overall design cycle, reducing the time to market for the final system.

Date

2018-05-08