
Protecting Your IP
Circuits built out of standard products are inherently insecure, because anyone can purchase the components. There are protection bits for software but these can be overcome, particularly for the common processors.
One method of protecting IP that is extremely difficult to get around is including a custom component, such as an ASIC. The thief is faced with a choice of either reverse engineering the ASIC, or redesigning an equivalent system. Both approaches take time and money. If the requirements for time and money are high enough, then the thief will find alternative targets.
An ASIC can be reverse-engineered. We know, since we regularly reverse engineer obsolete processors. But it is difficult, and time consuming process, typically taking a year or more to accomplish. Tekmos uses a gate array architecture in our ASICs, and that makes it more difficult to reverse engineer, since it lacks regular structures that assist in the reverse engineering effort.
If protecting a design is critical, we can take additional measures to protect it. First, we can combine the logic with additional, non-functional logic. Generally, the time to reverse engineer a design is related to the size of the design. Making the design larger increases the time to reverse engineer it.
As part of the data base preparation, we must add a fill pattern that raises the average metal density to 50%. Normally, this pattern is just rectangles. But we can make this pattern appear to be interconnected. And as before, the more interconnect, the harder it is to decode.
And finally, we can use invisible implants to disguise the true function of transistors. Thus, what appears to be a typical NAND gate might be an inverter instead, with one non-working input. Known as “gotchas”, these can kill a copied design and take a long time to debug.
Working together, we can protect your design to the level you require.
Date
2013-04-02

Wafers Edge Blog
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